Design Space Exploration Scheme for Mapping Convolutional Neural Network on Zynq Zedboard

dc.contributor.authorHassan, M Sohaib Ul
dc.contributor.authorKhan, Umar S
dc.contributor.authorKhawaja, Sajid Gul
dc.date.accessioned2024-11-19T12:06:55Z
dc.date.available2024-11-19T12:06:55Z
dc.date.issued2020-06-25
dc.description.abstractConvolutional Neural Network (CNN) is an important machine learning algorithm. Due to its broad applications and classification accuracy it has become hot topic in recent times. CNNs are both computationally expensive and have extensive memory accesses which has rendered it inefficient on general purpose computers. GPU implementations have improved the performance of algorithm but high energy consumption of GPUs doesn't allow its usage in robotics and mobile embedded platforms. In this paper we study the mapping of Convolutional Neural Networks on field programmable gate arrays (FPGAs). We implement a VGG-16 style network which are the most admired CNN architectures in community. We Used Xilinx Zynq Zedboard for analytical modeling and mapping of CNN. For a complete network implementation, we achieved a peak performance of 1.3 GMACCs at 120 MHz frequency. Our implementation achieves a speed up of 4 times compared to software implementation on General Purpose Computer. Keywords Field programmable gate arrays, Computer architecture, Convolutional neural networks, Convolution, Software
dc.identifier.citationHassan, M. S. U., Khan, U. S., & Khawaja, S. G. (2020, June). Design Space Exploration Scheme for Mapping Convolutional Neural Network on Zynq Zedboard. In 2020 12th International Conference on Electronics, Computers and Artificial Intelligence (ECAI) (pp. 1-5). IEEE.
dc.identifier.doihttps://doi.org/10.1109/ECAI50035.2020.9223137
dc.identifier.urihttps://repository.adu.ac.ae/handle/1/7076
dc.language.isoen_US
dc.publisherIEEE
dc.titleDesign Space Exploration Scheme for Mapping Convolutional Neural Network on Zynq Zedboard
dc.typeConference Paper

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